Group: Hardware/Computers/Single Board Computers/TBS2910 Matrix ARM mini PC
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(→Boot settings) |
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SRC_SBMR2 is at 0x020D801C according to the [https://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf IMX6DQRM.pdf] reference manual. | SRC_SBMR2 is at 0x020D801C according to the [https://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf IMX6DQRM.pdf] reference manual. | ||
<pre> | <pre> | ||
| − | + | [root@parabola ~]# devmem2 0x020D801C w | |
| − | + | /dev/mem opened. | |
| + | Memory mapped at address 0xb6fb9000. | ||
| + | Value at address 0x20D801C (0xb6fb901c): 0x2000001 | ||
</pre> | </pre> | ||
| − | BMOD[1:0] are the bits 24 and 25 of that register, which are | + | BMOD[1:0] are the bits 24 and 25 of that register, which are 10. |
BMOD is a register field that correspond to the BOOT_MODE settings, which are explained in the table below or the table in the "8.2.1 Boot mode pin settings" chapter of the reference manual. | BMOD is a register field that correspond to the BOOT_MODE settings, which are explained in the table below or the table in the "8.2.1 Boot mode pin settings" chapter of the reference manual. | ||
| Line 44: | Line 46: | ||
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| − | So we are in "Boot | + | So we are in "Internal Boot" mode. |
<pre> | <pre> | ||
| − | + | [root@parabola ~]# devmem2 0x020D801C w | |
| − | + | /dev/mem opened. | |
| + | Memory mapped at address 0xb6fb9000. | ||
| + | Value at address 0x20D801C (0xb6fb901c): 0x2000001 | ||
</pre> | </pre> | ||
| − | The value of | + | The value of BT_FUSE_SEL is available SRC_SBMR2[4] which is 0 here. |
| − | From the | + | From the reference manual: |
<pre> | <pre> | ||
| − | If | + | If BT_FUSE_SEL = 0, specific boot configuration parameters may be set using |
| − | + | GPIO pins rather than eFUSEs. The fuses that can be overridden when in this mode | |
| − | + | are indicated in the GPIO column of Table 8-2. Table 8-3 provides the details on the | |
| − | + | GPIO pins. | |
| − | |||
</pre> | </pre> | ||
| − | |||
| − | |||
Latest revision as of 15:48, 14 March 2023
Introduction
The TBS2910 Matrix ARM mini PC is an I.MX6 Quad SBC.
Upstream support
u-boot: tbs2910_defconfig
Linux: imx6q-tbs2910.dts
Boot settings
The board I have has the following markings on the PCB: TBS-2910V23
The schematics don't seem to fully match as I've a switch component with 4 switches inside whereas the schematics have 8.
Hence my need to document the boot settings.
SRC_SBMR2 is at 0x020D801C according to the IMX6DQRM.pdf reference manual.
[root@parabola ~]# devmem2 0x020D801C w /dev/mem opened. Memory mapped at address 0xb6fb9000. Value at address 0x20D801C (0xb6fb901c): 0x2000001
BMOD[1:0] are the bits 24 and 25 of that register, which are 10.
BMOD is a register field that correspond to the BOOT_MODE settings, which are explained in the table below or the table in the "8.2.1 Boot mode pin settings" chapter of the reference manual.
| BOOT_MODE[1:0] | Boot Type |
|---|---|
| 00 | Boot From Fuses |
| 01 | Serial Downloader |
| 10 | Internal Boot |
| 11 | Reserved |
So we are in "Internal Boot" mode.
[root@parabola ~]# devmem2 0x020D801C w /dev/mem opened. Memory mapped at address 0xb6fb9000. Value at address 0x20D801C (0xb6fb901c): 0x2000001
The value of BT_FUSE_SEL is available SRC_SBMR2[4] which is 0 here.
From the reference manual:
If BT_FUSE_SEL = 0, specific boot configuration parameters may be set using GPIO pins rather than eFUSEs. The fuses that can be overridden when in this mode are indicated in the GPIO column of Table 8-2. Table 8-3 provides the details on the GPIO pins.
