Group: Hardware/Computers/BMC/Talos II

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Revision as of 15:13, 30 April 2023 by GNUtoo (talk | contribs) (Specifications: Add infos about SOC support in upstream Linux)
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Introduction

This page will have information about the BMC used in the Talos II (and maybe the Talos II Lite as well).

Issue

The main issue is that while all the hardware works with free software, there is no FSDG compliant distribution for the BMC.

Specifications

Comments
System on a chip Aspeed AST2500 BMC The support for that BMC is not in upstream Linux yet, though there are already very similar BMC using the Aspeed AST2500 supported upstream.
CPU ARMv6.[1] We have no FSDG distributions officially supporting ARMv6, though:
  • LibreCMC supports only ARMv7 (cortex A9[2]). So it might be necessary to look if OpenWRT has armv6 support, and to add the BMC to LibreCMC.
  • Guix has an ARMv6 toolchain (to build some free Raspberry Pi bootloaders), though due to the lack of GNU/Linux ARMv6 support (adding it would be time consuming) and minimum rootfs size (in the order of GiB), it could probably only be used to build a minimal firmware or kernel+initramfs.
RAM 512 MiB [3] 512 MiB is more than enough for small distributions or even Parabola. Guix needs 2GiB though (for guix pull -M 1 -c 1).
Storage 32 MiB [4] This should be enough to run LibreCMC and probably ProteanOS too. Note that it may also be possible to replace the flash chip with a bigger one, but it is unknown if the BMC will be able to boot from it or not.

Possible solutions

There are several approaches for fixing this issue:

  • Support for ARMv6, the Talos II BMC, and the necessary software to boot the host could be added to LibreCMC or ProteanOS.
  • Another way to fix it could be to make the most minimal software to boot the host without exposing any of the BMC features.

There is some documentation about other implementations than OpenBMC that might turn really useful for any of these approaches:

References

  1. According to the vendor Talos_II wiki page, the Talos II has an "AST2500 BMC with OpenBMC". That then links to their AST2500 wiki page that the AST2500 "Incorporates an ARM11 main CPU, as well as a ColdFire coprocessor.". And according to Wikipedia, ARM11 CPUs implements the ARMv6 architecture.
  2. https://librecmc.org/librecmc/downloads/snapshots/v1.5.10/targets/mvebu/cortexa9/
  3. aspeed-bmc-opp-talos.dts has the following: memory@80000000 { reg = <0x80000000 0x20000000>; }; 0x20000000 is 512 MiB (512 x 1024 x 1024 == 0x20000000).
  4. According to the Debricking_the_BMC article on the vendor wiki, the BMC uses a MX25L25635F/MX25L25645E/MX25L25665E flash chip, and the patch to add support for it in flashrom says that these flash chip have 32768 KiB.